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Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits
  • PDF
  • English
  • Year: 2007
  • Author: Manoj Sachdev, José Pineda de Gyvez
Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits: 2nd Edition
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  • English
  • Year: 2007
  • Author: Manoj Sachdev, José Pineda de Gyvez (auth.), Manoj Sachdev, José Pineda de Gyvez (eds.)
Integrated Circuit Defect-Sensitivity: Theory and Computational Models
  • PDF
  • English
  • Year: 1993
  • Author: José Pineda de Gyvez (auth.)
Low-Power High-Resolution Analog to Digital Converters: Design, Test and Calibration
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  • English
  • Year: 2011
  • Author: Amir Zjajo, José Pineda de Gyvez (auth.)
Low-Power High-Resolution Analog to Digital Converters: Design, Test and Calibration
  • PDF
  • English
  • Year: 2011
  • Author: Amir Zjajo, José Pineda de Gyvez (auth.)
Defect Oriented Testing for CMOS Analog and Digital Circuits
  • PDF
  • English
  • Year: 1999
  • Author: Manoj Sachdev (auth.)
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test
  • PDF
  • English
  • Year: 2008
  • Author: Andrei Pavlov, Manoj Sachdev
Thermal and Power Management of Integrated Circuits
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  • English
  • Year: 2006
  • Author: Arman Vassighi, Manoj Sachdev
Verbos alemanes Espasa
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  • German
  • Author: Pineda José Manuel.
ESD Protection Device and Circuit Design for Advanced CMOS Technologies
  • PDF
  • English
  • Year: 2008
  • Author: Oleg Semenov, Hossein Sarbishaei, Manoj Sachdev
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