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Timing
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  • Year: 2004
  • Author: Sachin S Sapatnekar
Timing
  • PDF
  • English
  • Year: 2004
  • Author: Sachin Sapatnekar
Timing
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  • Year: 2010
  • Author: Sachin Sapatnekar
Timing Analysis and Optimization of Sequential Circuits
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  • Year: 1999
  • Author: Naresh Maheshwari, Sachin S. Sapatnekar (auth.)
Designing Digital Computer Systems with Verilog
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  • Year: 2005
  • Author: David J. Lilja, Sachin S. Sapatnekar
Routing Congestion in VLSI Circuits: Estimation and Optimization (Series on Integrated Circuits and Systems)
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  • Year: 2007
  • Author: Prashant Saxena, Rupesh S. Shelar, Sachin Sapatnekar
Design Automation for Timing-Driven Layout Synthesis
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  • Year: 1993
  • Author: Sachin S. Sapatnekar, Sung-Mo Kang (auth.)
Routing Congestion in VLSI Circuits: Estimation and Optimization
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  • English
  • Year: 2010
  • Author: Prashant Saxena, Rupesh S. Shelar, Sachin Sapatnekar
Electromigration Inside Logic Cells: Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS
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  • Year: 2017
  • Author: Gracieli Posser, Sachin S. Sapatnekar, Ricardo Reis (auth.)
Handbook of Algorithms for Physical Design Automation
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  • English
  • Year: 2008
  • Author: Charles J. Alpert, Dinesh P. Mehta, Sachin S. Sapatnekar
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