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Layout Minimization of CMOS Cells
  • PDF
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  • Year: 1992
  • Author: Robert L. Maziasz, John P. Hayes (auth.)
Design, Analysis and Test of Logic Circuits Under Uncertainty
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  • English
  • Year: 2013
  • Author: Smita Krishnaswamy, Igor L. Markov, John P. Hayes (auth.)
Design, Analysis and Test of Logic Circuits Under Uncertainty
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  • English
  • Year: 2013
  • Author: Smita Krishnaswamy, Igor L. Markov, John P. Hayes (auth.)
Hierarchical Modeling for VLSI Circuit Testing
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  • English
  • Year: 1990
  • Author: Debashis Bhattacharya, John P. Hayes (auth.)
A Manual of Sumerian Grammar and Texts
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  • English
  • Year: 2000
  • Author: John L. Hayes
A Manual of Sumerian Grammar and Texts (Aids and Research Tools in Ancient Near Eastern Studies, No 5)
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  • English
  • Year: 1990
  • Author: John L. Hayes
Sumerian
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  • Year: 1999
  • Author: John L Hayes
Quantum Circuit Simulation
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  • English
  • Year: 2009
  • Author: George F. Viamontes, Igor L. Markov, John P. Hayes
Quantum Circuit Simulation
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  • English
  • Year: 2009
  • Author: George F. Viamontes, Igor L. Markov, John P. Hayes
Quantum Circuit Simulation
  • PDF
  • English
  • Year: 2009
  • Author: George F. Viamontes, Igor L. Markov, John P. Hayes
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