VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers

VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 – July 2, 2017, Revised Selected Papers

Author
Brajesh Kumar Kaushik,Sudeb Dasgupta,Virendra Singh (eds.)
Publisher
Springer Singapore
Language
English
Edition
1
Year
2017
Page
XXI, 815
ISBN
978-981-10-7469-1,978-981-10-7470-7
File Type
pdf
File Size
96.5 MiB

This book constitutes the refereed proceedings of the 21st International Symposium on VLSI Design and Test, VDAT 2017, held in Roorkee, India, in June/July 2017.
The 48 full papers presented together with 27 short papers were carefully reviewed and selected from 246 submissions. The papers were organized in topical sections named: digital design; analog/mixed signal; VLSI testing; devices and technology; VLSI architectures; emerging technologies and memory; system design; low power design and test; RF circuits; architecture and CAD; and design verification.

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