SystemVerilog for Hardware Description : RTL Design and Verification
- Author
- Vaibbhav Taraate
- Publisher
- Springer Singapore;Springer
- Language
- English
- Edition
- 1st ed.
- Year
- 2020
- Page
- XXI, 252
- ISBN
- 9789811544040,9789811544057
- File Type
- pdf
- File Size
- 7.0 MiB
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