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System on Chip Design Languages: Extended papers: best of FDL’01 and HDLCon’01
  • PDF
  • English
  • Year: 2002
  • Author: J. Bhasker, Paul J. Menchini (auth.), Anne Mignotte, Eugenio Villar, Lynn Horobin (eds.)
A Veriog HDL Primer
  • PDF
  • English
  • Year: 1999
  • Author: J. Bhasker
Verilog HDL Synthesis A Practical Primer
  • PDF
  • English
  • Year: 1998
  • Author: J. Bhasker
A Verilog HDL Primer
  • DJVU
  • English
  • Year: 1998
  • Author: J. Bhasker
An ASIC Low Power Primer: Analysis, Techniques and Specification
  • PDF
  • English
  • Year: 2013
  • Author: Rakesh Chadha, J. Bhasker (auth.)
Static Timing Analysis for Nanometer Designs: A Practical Approach
  • PDF
  • English
  • Year: 2009
  • Author: Rakesh Chadha, J. Bhasker (auth.)
Static timing analysis for nanometer designs: a practical approach
  • PDF
  • English
  • Year: 2009
  • Author: Rakesh Chadha, J. Bhasker (auth.)
System-on-Chip Methodologies & Design Languages
  • PDF
  • English
  • Year: 2001
  • Author: Robert H. Klenke, James H. Aylor, Paul Menchini, Ron Waxman, William Anderson (auth.), Peter J. Ashenden, Jean P. Mermet, Ralf Seepold (eds.)
System Specification & Design Languages: Best of FDL’02
  • PDF
  • English
  • Year: 2004
  • Author: Ernst Christen (auth.), Eugenio Villar, Jean Mermet (eds.)
Embedded Systems Specification and Design Languages: Selected contributions from FDL’07
  • PDF
  • English
  • Year: 2008
  • Author: Jens Brandt, Klaus Schneider (auth.), Prof. Eugenio Villar (eds.)
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